1. Field
This disclosure relates generally to data processing systems, and more specifically, to bandwidth control for a direct memory access unit within a data processing system.
2. Related Art
Conventional direct memory access (DMA) operations move information from one location to another, typically independent of a central processor or central processing unit (CPU). However, inefficiencies arise when DMA operations transfer information between a combination of higher speed and lower speed devices, such as input/output (I/O) devices, peripherals, and local memory. For example, a slow device may have bandwidth constraints that are lower than the capability of the DMA unit, causing request queues between the DMA unit and the slow device to fill up. This limits the bandwidth available for higher speed devices. Therefore, a need exists for improved bandwidth control for a DMA unit.